This synthesizer board, with output in the 2 GHz range has been one of the most
available to amateurs in the last few years. When used with a good oven-controlled or
temperature-compensated 10 MHz crystal reference oscillator, it can provide frequency
accuracy and stability we could only dream about in the past. N6IZW indicated in Reference 2
that the 10 MHz TCXOs used in the Qualcomm assemblies are rated at better than + or -
30 Hz from -40C to +85C. This is about 60 Hz per degree at 1296 MHz or 500 Hz per
degree at 10 GHz. A good oven-controlled oscillator will be about 100 times better with a
typical stability of 1 part per 100 million. As we begin today to consider digital modes like
PSK31 or synchronous detection, the precision and drift-free performance of our local
oscillators have become critical factors.
The photo of Figure 1 shows the synthesizer described in this
article. It measures
approximately 3 5/8 by 8 1/2 inches, however the rightmost 2/3 of the synthesizer pcb can be
cut off and discarded for our purposes. This leaves a very compact precision frequency
source of 3 5/8 by 2 1/2 inches,as shown in Figure 2.
The VCO on this synthesizer board produces about +10 dBm output in the 2.1-2.7
GHz range. On the board this output frequency is divided by two and applied as one input to
the synthesizer IC. Depending on the particular board, this will be a Qualcomm 3036, 3216,
or 3236 IC. The VCO/2 input is further divided internally by a factor ( N ) to match the
frequency of the ICs internal phase-locked loop ( PLL ). In our modification, the N division
ratio is set by hard-wiring the pins of the ICs internal registers ( M ) and ( A ). The second
synthesizer IC input is from an external precision temperature-controlled 10.00 MHz crystal
oscillator (TCXO). This input is divided by a preset factor ( R +1 ) to provide the stable
reference frequency for the PLL. Our modification also involves hard-wiring the R register
pins. Figure 3 shows a functional block diagram of the synthesizer board, indicating those
functions carried out internally by the synthesizer chip.
The first step in the modification process is the choice of output (VCO) frequency.
This requires some knowledge of the basic limitations of the synthesizer. As built, the loop
filter component values were designed for an internal PLL frequency of 5.00 MHz. This PLL
frequency allowed the VCO output to be locked at any 10.00 MHz step in its output frequency range
(i.e. 2550, 2560, 2570 MHz etc.). In other words, due to the divide-by-two relationship
between the VCO and the synthesizer IC input, the possible VCO output frequencies are
spaced by twice the PLL frequency. For amateur radio purposes as a signal or LO source, we
usually like to specify the frequency on an exact multiple of 1.0 or 2.0 MHz. The example of
this article will be as an LO source for a 10,368 MHz transverter using a 144 MHz i.f.
transceiver. The low-side LO must therefore be 10224 MHz. As the synthesizer operates in
the 2.1-2.7 GHz range, we need the VCO to operate at 2556 MHz with an external X4
multiplier to provide the 10224 MHz output. The 3036 synthesizer IC input will then be
2556/2 or 1278 MHz.
The R Register can be set to any integer from 0 to 15. The 10 MHz reference is
divided by (R+1), or from 1 to 16. Possible PLL frequencies are therefore 10, 5, 2.5, 2.0,
1.25, 1.0, to name a few. In order to minimize phase noise in the output we should choose the
highest possible PLL frequency that is an integer sub-multiple of the 1278 MHz input. In this
case, that is 2.00 MHz.
The Programming relationships for the 3036/3216/3236 synthesizer ICs are as follows:
PLL = Internal phase lock loop frequency
REF = External reference oscillator frequency
N= Ratio of 3036 Synthesizer input frequency to the internal PLL frequency (an integer).
M= INT ( N / 10 ) - 1
A = N - 10 * ( M+1 )
R = ( REF / PLL ) - 1
For our VCO example of 2556 MHz, VCO/2 = 1278 and PLL of 2.00 MHz:.
N = 1278 / 2 = 639
M = INT (63.9) - 1 = 62
A = 639 - 10 * ( 62 + 1) = 9
and R = (10.00/ 2.00) - 1 = 4
N6IZW developed an easy way to determine the register settings for any compatible
VCO and PLL frequencies. Figure 4 shows his interactive Excel spreadsheet example of the
programming described above, including the specific synthesizer IC pins assigned to the
M, A, and R registers and their modified and unmodified state. This spreadsheet can be
downloaded as a zip file so that you can use it to solve your own synthesizer programming
Now that we know the required pin settings for the synthesizer chip, we can proceed
with the modifications. Figure 5 shows the orientation of the synthesizer IC with a dot
located in the middle of the right side designating pin #1. Pin numbers go in a counter-
clockwise direction as indicated in the drawing. Before beginning with the modifications,
you should check your synthesizer board with an ohmmeter in the low-voltage mode to
verify the "as-built" state of the pins involved in the M, A, and R, registers. The spreadsheet
example in Figure 4 may not be correct for all models of this board. Record the pins that are
already grounded. Others not showing ground must be considered indeterminate
The modifications require that you lift or ground the indicated pins of the synthesizer
chip. This is done using a sharp X-Acto type knife blade and a steady hand, with the aid of a
good magnifying lens. To program any of the ungrounded pins to low state (0)
cut them at the board with the knife and carefully lift them. Now tie these pins with a fine
strand of wire (tack solder) to a nearby ground or grounded pin. To program any pin to the
(1) state, cut and lift it clear of the board.
In addition to the register pins mentioned above, Pin 22 must be set high (1) and Pin
16 must be grounded, if not already grounded. These enable the pin-by-pin programming
mode of our modification.
To summarize these modifications, you should cut and lift Pins 4, 8, 9, 10, 13,
18, 21, and 22. Then cut and lift Pin 7 and tie it to a nearby ground (Pin 6 is just around the
corner). Pin 16 is already grounded.
As mentioned above, the PLL in the original configuration of this synthesizer
operated at 5 MHz. In our modification, we have changed the internal PLL frequency to 2
MHz, and the PLL loop filter constants must now be changed. This is done by paralleling
each of the shunt capacitors with 3000 pf chip capacitors, and by paralleling the series
capacitor with a 1000 pf capacitor. Do this by soldering the new chip caps to the originals in
"piggyback" configuration. The Excel spreadsheet shows the values of added capacitance for
other PLL frequencies. Figure 6 shows the location of the shunt and series capacitors of the
PLL loop filter.
Figure 7 shows the connections for power and for the 10 MHz Reference
normal TCXO signal input we observe is about 4 volts peak-to-peak Connect a small
coax cable to the board for RF output to the point indicated in Figure 8.
The required testing is minimal. Near the synthesizer IC you can observe the LED
indicator (DS1) on the pcb. It is shown in Figure 9. When power is applied, the LED should
flash on and then extinguish to indicate synthesizer lock. If it comes on and stays on, then the
synthesizer is not locked. With a 3036 synthesizer, the pcb should draw about 0.6A at
12V. With a 3216 or 3236 the current should be about 0.3A. If your board uses a 3036,
be sure to heat sink it.
N6IZW pointed out in Reference 2 that local oscillator phase noise can be an issue
operation when there are strong nearby local stations or beacons which may be many tens of dB
stronger than, and only tens of KHz away from the very weak signal you are trying to contact. The
phase noise will raise the noise floor, and some interference from the strong stations will be heard.
We have experienced this problem when several of us gather, a few yards apart on a local hill during
microwave contests. Synthesizer phase noise becomes more pronounced with higher orders of LO
frequency multiplication creating more of an issue at higher frequencies (10 GHz and 24 Ghz). Typical
phase noise of the Qualcomm synthesizer is around -80 dBc/Hz ten kHz from the carrier at 10 GHz,
where a Frequency West Brick is around -110 dBc/Hz. At the lower multiplication orders for 1296,
2304, 3456, etc., the phase noise is greatly reduced. This is a trade-off of the synthesizer approach
versus the drift and lack of long term precision seen in LOs based on 100 Mhz crystals
N6IZW Recently used one of these synthesizer boards as an LO source for a 1296
He programmed the synthesizer for 2304 MHz and used the VCO/2 output of the on-board
divide-by-two prescaler at 1152 MHz. This signal is available at the point shown in Figure 10. He
used an external ERA-3 MMIC rf amplifier to boost this low-level signal to about +7 dBm. This
approach extends the usable range of the synthesizer board to approximately 1050-1350 MHz
The original modifications for this synthesizer board were developed by Chuck
Houghton, WB6IGP, and Kerry Banke, N6IZW, and have been widely disseminated to
amateurs. This web version includes some new diagrams and more close-up photographs
with labels to clarify the location of the critical elements of the modification
1. "The Qualcomm Synthesizer - An Easy LO For Microwave Communication Use",
Houghton, WB6IGP, Microwave Update '99, October 1999, PP 111-114.
2. "Converting Surplus Qualcomm OmniTrack Microwave Assemblies For Use With
Amateur Satellites", Kerry Banke, N6IZW, 1999 AMSAT-NA Proceedings, October 1999
3. "Modifying the Qualcomm Synthesizer", in "Above & Beyond" Column, C.L. Houghton, WB6IGP
73 Magazine, October 1996, P 71.
The (Web) author can be contacted at:
6255 Radcliffe Drive
San Diego, CA 92122
February 3, 2001