Harmonic Cancellers for HD Radio Signals

Nearly all stereo decoders use a 38 kHz square wave to demodulate the L−R signal, which occupies 23 to 53 kHz in the stereo composite. An unintended consequence is that the waveform's fifth harmonic demodulates power near 190 kHz. HD Radio digital sidebands, which appear at 129 to 198 kHz for hybrid service mode MP1, can cause an annoying background noise when the fifth harmonic demodulates them. Extended hybrid signals, whose spectrum goes down to 116 kHz for service mode MP3, cause additional noise due to the third harmonic at 114 kHz. A lowpass filter between the FM detector and stereo decoder can eliminate this HD Radio self-noise.

Prior Art

U.S. patent 4,264,784 describes a four-level waveform with no third or fifth harmonic. Sansui used this waveform, known as a Walsh function, in a discrete stereo decoder. U.S. patent 5,027,402 describes a Walsh-function stereo decoder Allegro Microsystems implemented as the A3828EA IC. This is an improved replacement for the Sprague/Allegro ULN3827A. The Sanyo LA1837, LA1838, LA1844, and LA1845 multifunction ICs use a Walsh function. All of these circuits suppress HD Radio self-noise for both hybrid and extended hybrid signals.

The Siemens TCA4500A stereo decoder, second-sourced as the Motorola TCA4500A and the National Semiconductor LM4500A, uses a three-level demodulation waveform with no third harmonic. The Sanyo LA3450, produced by Sony as the CXA1064, uses a four-level waveform with the same result. These decoders do not suppress noise for hybrid HD Radio signals, which have no power near the third harmonic.

Fifth-Harmonic Canceller

If the duty cycle of the TCA4500A waveform is increased to 40%, the fifth harmonic disappears. A stereo decoder using this waveform would eliminate self-noise for hybrid HD Radio signals. The waveform can be synthesized for a squarewave stereo decoder by synchronously blanking 20% of the input signal each 38 kHz half-cycle. A circuit that phase-locks a 380 kHz oscillator to the stereo pilot and drives an analog switch with a decoded decade divider would accomplish this. But for stereo decoders such as the Sanyo LA3380, Hitachi HA11223W, or NEC PC1223C that generate a 76 kHz sawtooth VCO waveform, a simplified circuit using analog timing is possible.

A 4066 analog switch level-detects the sawtooth waveform. An RC network delays the trailing edge about 1.3 s, two additional switches in the quad package square up the pulse, and a final switch blanks the detected FM signal. Adjust the pot to null the 1 kHz tone when modulating an FM signal generator with 191 kHz. Although not critical, you can adjust the RC network to center the blanking interval about the sawtooth transition. The circuit drops the L−R signal 0.4 dB, yielding a slightly lower audio output level. L+R drops 1.5 dB more so you must readjust the separation control. Timing may vary somewhat if the IC input threshold changes with temperature. For a bipolar composite signal, connect VSS and circuit grounds to the negative supply. VDD−VSS is 12 V maximum for a 74HC4066. Use a CD4066B to 15 V, or a Sanyo LC4966 to 37 V.

Third- and Fifth-Harmonic Canceller

This circuit uses a quad op-amp and FET to implement the four-level Walsh function with analog timing. The unconnected noninverting op-amp pin goes to the detector midpoint voltage in a single-supply system or to ground for dual supplies. Set the threshold pots so that the FET is off during the middle 50% of each 38 kHz half-cycle. Set the gain pot so that the half-cycle end levels are about 40% of midlevel. Make final adjustments to minimize 1 kHz audio output when alternately modulating an FM generator with 115 and 191 kHz sine waves.

If the 10kΩ input resistance is too low for the FM detector, use the spare op-amp as a voltage follower. The circuit compensates for the 1.6 dB Walsh-function loss at 38 kHz so the audio output level doesn't change. L+R drops 1.4 dB so you must readjust the separation control. Any high-speed op-amp will work. Any FET that turns off with the input op-amps saturated low and whose on-resistance is small compared with the typical 8kΩ pot setting is suitable. If FET resistance is too high, harmonic distortion may occur as the resistance varies nonlinearly with drain-source voltage. Find a better FET, or replace the FET, gate resistor, and diode with a low-resistance analog switch.

Digital Implementation

A three-level waveform eliminates gain adjustment, while a digital timebase eliminates timing adjustment. A waveform with no third or fifth harmonic requires two complementary fifteen-bit sequences. The sequence 010111111110100 maximizes the fundamental. The bit length is one-thirtieth of the period of a 38 kHz sine wave. Implementation requires a phase-locked 1.14 MHz oscillator, a counter with decoding logic, and an analog switch. Although it increases only 0.1 dB, a half-bit delay maximizes the in-phase fundamental. This can be done digitally by starting at 2.28 MHz. The resulting waveform drops L−R 1.6 dB and L+R 3.5 dB.


September 12, 202188108 MHz